Beginner of FPGA.
I am creating a simple circuit using VHDL.
It ’s a simple question,
What is the best way to convert a digitally input 2bit signal to 16bits?
The input data type is std_logic_vector (1 downto 0), but I want to convert it to std_logic_vector (15 downto 0).
I'm sorry for the rudimentary, but please teach me.
Answer # 1
What are the rules for converting those 2 bits to 16 bits?
If it is clear, it will be a story about making a table if it is about 2 bits, but
If you do n’t want to read it,
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